DOIONLINE 
DOIONLINE Publish In |
International Journal of Industrial Electronics and Electrical Engineering (IJIEEE)-IJIEEE |
 Journal Home Volume Issue |
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Issue |
Volume-2,Issue-1 ( Jan, 2014 ) | |||||||||
Paper Title |
A Rom Architecture Based Look-Up-Table Design And Memory-Based Implementation Of Fir Digital Filter | |||||||||
Author Name |
V.Vijaya, G.Laxmaiah | |||||||||
Affilition |
ECE Dept (VLSI) System Design Vaagdevi College of Engineering | |||||||||
Pages |
50-54 | |||||||||
Abstract |
Finite-Impulse response (FIR) digital filter is widely used as a basic tool in various signal processing and image processing applications. New approaches to LUT-based-multiplication are suggested to reduce the LUT-size over that of conventional design. Distributed arithmetic (DA)-based computation is popular for its potential for efficient memory-based implementation of finite impulse response (FIR) filter where the filter outputs are computed as inner-product of input-sample vectors and filter-coefficient vector. In a ROM architecture based LUT design we are using a ROM of 9 words. We have synthesized the proposed LUT-multiplier and ROM based LUT-multiplier for 4-bit input word. | |||||||||
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