DOIONLINE 
DOIONLINE Publish In |
International Journal of Industrial Electronics and Electrical Engineering (IJIEEE)-IJIEEE |
 Journal Home Volume Issue |
||||||||
Issue |
Volume-5,Issue-4 ( Apr, 2017 ) | |||||||||
Paper Title |
Design of Multi – Master I2cbus Controller | |||||||||
Author Name |
Jukuri Maheshbabu, K.Vamsi Krishna, Purini Venkata Seshamma | |||||||||
Affilition |
152W1D6807 GVR&S College of Engineering and Technology Asst.Prof. Dept.Of ECE GVR&S College of Engineering and Technology 162W1D6807 GVR&S College of Engineering and Technology | |||||||||
Pages |
59-62 | |||||||||
Abstract |
This paper presents design and implementation of Multi – Master Inter – Integrated Circuit (often written as or IIC) Bus Controller. The Multi – Master C Bus Interface is a circuit to perform serial communication based on data format transfer. The arbitration lost detect function makes multi master communication possible. The communication is done on four modes of data transfer depending on the application. The module was designed in Verilog HDL. It is simulated and synthesized using Xilinx Design Suite 13.2 Index Terms- C, Master, Serial data communication, Slave, Xilinx. | |||||||||
| View Paper | ||||||||||
