DOIONLINE 
DOIONLINE Publish In |
International Journal of Industrial Electronics and Electrical Engineering (IJIEEE)-IJIEEE |
 Journal Home Volume Issue |
||||||||
Issue |
Volume-4,Issue-12 ( Dec, 2016 ) | |||||||||
Paper Title |
Simulation of Advanced Encryption Standard Algorithm | |||||||||
Author Name |
A Sowmya | |||||||||
Affilition |
Pursuing M.Tech (VLSI & ES), Vignan’s Institute of Engineering for Women, Visakhapatnam-530046, Andhra Pradesh, India | |||||||||
Pages |
21-26 | |||||||||
Abstract |
Advanced Encryption Standard (AES) is an encryption standard used for securing information. AES is a block cipher algorithm that has been analyzed extensively and is now used widely. AES is very secure and has no known weakness. In this work, both encryption and decryption will be carried out with the key length of 128 bits, that is, both AES encrypter and the AES decrypter were integrated. Hence the input block and secret key will be provided for encryption and the cipher block and same secret key will be provided to the decryption to get the proper block as output. All the transformations of both Encryption and Decryption will be developed using VHDL language and will be verified with the help of its simulation result using XILINX ISE simulator. Index Terms— Architecture, Background, Crypto Graphical Methods, Block-Diagram, Encryption, Key Expansion, Decryption, Simulation Results. | |||||||||
| View Paper | ||||||||||
