DOIONLINE 
DOIONLINE Publish In |
International Journal of Industrial Electronics and Electrical Engineering (IJIEEE)-IJIEEE |
 Journal Home Volume Issue |
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Issue |
Volume-4,Issue-8 ( Aug, 2016 ) | |||||||||
Paper Title |
Timing Closure and Leakage Optimization Using MCMM Optimization | |||||||||
Author Name |
Nilesh Sharad Khandekar, Vanita Agarwal | |||||||||
Affilition |
Dept. of Electronics and Telecommunication engineering, College of engineering, Pune, India | |||||||||
Pages |
84-86 | |||||||||
Abstract |
As we know the time to market in VLSI industry is reducing and design are becoming complex in terms of corners and mode, we have proposed a flow which will reduce the leakage power, number of iterations of fixing timing in different corners and which is cost efficient in terms of cost of libraries and cost of license provided by tools for leakage recovery. | |||||||||
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