Publish In |
International Journal of Industrial Electronics and Electrical Engineering (IJIEEE)-IJIEEE |
Journal Home Volume Issue |
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Issue |
Volume-2, Issue-12 ( Dec, 2014 ) | |||||||||
Paper Title |
Optimal Location & Optimal Sizing of FACTS Device using Bacterial Foraging Algorithm for Improving Voltage Profile and Loss Minimization | |||||||||
Author Name |
J.Kalyan Kumar, I.Prabhakar Reddy | |||||||||
Affilition |
PG Student, Dept of Electrical and Electronics Engineering, Narayana Engineering College, Nellore, A.P, India H.O.D, Dept of Electrical and Electronics Engineering, Narayana Engineering College, Nellore, A.P, India | |||||||||
Pages |
6-9 | |||||||||
Abstract |
This project bestows optimal sizing and placement of FACTS device, which is achieved by the searching method of bacteria foraging algorithm (BFA) with optimal sizing of FACTS device. Static Var Compensator (SVC) is one of the FACTS devices, utilized for progress of voltage profile and loss minimization. The precise strategy of SVC offers the real power loss minimization with increase of voltage profile. The proposed algorithm is made estimated in IEEE 30 bus system. The results illustrate that progress of voltage profile with loss minimization in the transmission line. | |||||||||
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