DOIONLINE 
DOIONLINE Publish In |
International Journal of Industrial Electronics and Electrical Engineering (IJIEEE)-IJIEEE |
 Journal Home Volume Issue |
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Issue |
Volume-2,Issue-11 ( Nov, 2014 ) | |||||||||
Paper Title |
Reduction Of Switches And Voltage Divices In New Cascaded H-Bridge Multilevel Inverter Topology | |||||||||
Author Name |
S.V.Kishor Babu, K.Chakravarthi | |||||||||
Affilition |
Student, Dept Of Electrical And Electronics Engineering, G.Pulla Reddy Engineering College (Autonomous), Kurnool, A.P, India Assistant Professor, Dept Of Electrical And Electronics Engineering, G.Pulla Reddy Engineering College(Autonomous), Kurnool, A.P, India | |||||||||
Pages |
87-90 | |||||||||
Abstract |
A new general cascaded multilevel inverter is developed by using H-bridges in this paper. This topology consists of lower blocking voltage on switches and requires less number of dc voltage sources, power switches which results in decreasing the complexity and total cost of the inverter. These abilities obtained within comparing the topology with the conventional topologies from above-mentioned point of view. Moreover, a new algorithm is used to determine the magnitude of dc voltage sources for generation all voltage levels . The performance has been analyzed by functionality accuracy of the topology by using its new algorithm in generating all voltage levels for a 7-level and 31- level inverters are simulated using MATLAB/SIMULINK.The output shows the better performance results. | |||||||||
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