DOIONLINE

DOIONLINE NO - IJIEEE-IRAJ-DOI-1198

Publish In
International Journal of Industrial Electronics and Electrical Engineering (IJIEEE)-IJIEEE
Journal Home
Volume Issue
Issue
Volume-2,Issue-9  ( Sep, 2014 )
Paper Title
Design Of 8-Bit Low Power CMOS D-Flip Flop Based Shift Registers
Author Name
M.Govindu, K. Prasad Babu, S.Ahmed Basha, K.Suvarna, H.Devanna
Affilition
M.tech VLSISD student, SJCET , Assistant Professor ECE Dept, SJCET , Assistant Professor ECE Dept SJCET, Associate Professor ECE Dept, SJCET, Associate Professor ECE Dept, SJCET
Pages
42-46
Abstract
Shift registers occupy an important position in most digital systems. They are often used to momentarily store binary information needed to be coded or decoded. They also play an important link between systems using sequential I/O channels. The flip-flops in a register must be wired so binary data can be inserted (shifted) into the register, and probably shifted out as well. Currently Low power consumption is crucial in digital design part. Shift registers are used for Storage of digital data. In this project, the design of CMOS Low power SISO, SIPO, PISO and PIPO using D-flip flops, each of 8-bit size is being done. Various foundries are used and analyzed. CMOS is a technology for constructing integrated circuits
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