DOIONLINE 
DOIONLINE Publish In |
International Journal of Industrial Electronics and Electrical Engineering (IJIEEE)-IJIEEE |
 Journal Home Volume Issue |
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Issue |
Volume-2,Issue-9 ( Sep, 2014 ) | |||||||||
Paper Title |
Comparison Of Multilevel Topologies With And Without Selective Harmonic Reduction | |||||||||
Author Name |
Pradeep R, Chekuri Harikrishna Teja, Jaseerali E Y, Mohammed Fasid K P, Sreekumar M B, Junaid Bin Muhammed | |||||||||
Affilition |
PG Scholar, Department of EEE Amrita Vishwa Vidyapeetham, Bangalore MEA Engineering College, Perinthalmanna, Kerala, India | |||||||||
Pages |
38-41 | |||||||||
Abstract |
Multilevel inverter is an inevitable part of power electronics, as it is widely used in many industrial applications. Multilevel inverter is more advisable when compared to the common inverter because of its reduced THD and hence multilevel inverter is always used to supply AC machines. Since the multilevel inverter is of that importance in industries, wide research had been doing for years to propose various topologies of multilevel inverter. These topologies were aiming at reducing number of switches, number of DC sources used and voltage across the switches which can ultimately reduce the THD. Out of various topologies that has been proposed by researchers, multilevel inverter in normal cascaded connection and multilevel inverter using series connected sub-multilevel topology with and without incorporating reduced harmonic reduction are taken up for comparison in this paper. These topologies are simulated in the paper and results are taken for comparison. | |||||||||
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