DOIONLINE 
DOIONLINE Publish In |
International Journal of Industrial Electronics and Electrical Engineering (IJIEEE)-IJIEEE |
 Journal Home Volume Issue |
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Issue |
Volume-6,Issue-3 ( Mar, 2018 ) | |||||||||
Paper Title |
Realization of all Logic Gates with NAND Gate using OptiSpice | |||||||||
Author Name |
Sonali Dash, Abhijeet Singh, Ankit Mishra, Dheeraj Anand | |||||||||
Affilition |
Department of Electronics and Telecommunication Engineering, Bharati Vidyapeeth (Deemed To Be) University, College of Engineering, Pune, Maharashtra | |||||||||
Pages |
9-13 | |||||||||
Abstract |
This study implements NAND gate as universal gate to realize other gates (XOR, OR, AND, NOT) using Hierarchical model in OptiSpice Software. Keywords - Logical gate, Universal gate, Hierarchical model, Sub-circuits | |||||||||
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