DOIONLINE 
DOIONLINE Publish In |
International Journal of Industrial Electronics and Electrical Engineering (IJIEEE)-IJIEEE |
 Journal Home Volume Issue |
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Issue |
Volume-2,Issue-8 ( Aug, 2014 ) | |||||||||
Paper Title |
Effect Of Interconnects On Delay Estimation With Noise Optimization | |||||||||
Author Name |
G.Nallathambi, S.Rajaram | |||||||||
Affilition |
Research Student, Associate Professor, Thiagarajar College of Engineering, Electronics and Communication Department, Madurai | |||||||||
Pages |
1-5 | |||||||||
Abstract |
At today’s nanometer technology, the interconnect delay is surpassing the device delay; therefore, there is a need to predict interconnect delay before the layout phase. In this paper, we use a wire length estimation technique that can predict the lengths of individual wires before placement and routing. Also, Wire width sizing is to be considered for delay optimization. The aim is to identify only those parameters which can be obtained with out actual place and route and thus can be used toestimate individual wire lengths before layout. And wefocuses on the trends of coupling effects on noise in delay estimation. | |||||||||
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