DOIONLINE

DOIONLINE NO - IJIEEE-IRAJ-DOI-11017

Publish In
International Journal of Industrial Electronics and Electrical Engineering (IJIEEE)-IJIEEE
Journal Home
Volume Issue
Issue
Volume-6,Issue-2  ( Feb, 2018 )
Paper Title
Variation in Parameters of CMOS Op-Amp Designed using GPDK 180nm and GPDK 90nm Technology
Author Name
Vaibhav.B.Waghmare, A.I.Tamboli
Affilition
PG Student Electronics Engineering, Shri Guru Gobind Singhji, Institute of Engineering and Technology Ass.Professor Electronics Engineering, Shri Guru Gobind Singhji, Institute of Engineering and Technology
Pages
28-33
Abstract
In this paper behavior of multiple energy storage elements of Op-amp is observed. Initially a two stage Op-amp is designed using CMOS technology in VLSI. Designed Op-amp consist of differential amplifier & gain amplifier. The initial stage of differential amplifier removes the noise and only amplifies the actual signal. Since the amplified signal does not meet Op-amp requirements a gain amplifier is used for amplification. 2nd stage is a common source amplifier which is used to increase the gain. Keywords- Cadence gpdk090, gpdk180, Differential Amplifier, Common Source amplifier, current Mirror circuit.
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