DOIONLINE 
DOIONLINE Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
 Journal Home Volume Issue |
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Issue |
Special Issue-1 ( Apr, 2015 ) | |||||||||
Paper Title |
FPGA Based Fingerprint Minutiae Extraction Algorithm | |||||||||
Author Name |
Swati G.Bhandarakawate, S. M. Rajbhoj | |||||||||
Affilition |
Department of Electronics and Telecommunication, Bharati Vidyapeeth’s College of Engineering for Women, Pune, India | |||||||||
Pages |
85-87 | |||||||||
Abstract |
In recent years security is becoming most important role in our daily activities. We need to carry ATM cards; credit cards; license and also we need to remember. These all have disadvantages like robbery, theft, remembering passwords. So for these reason biometric identification technique is used and fingerprint recognition is the one of the most popular biometric identification technique. Currently fingerprint technology is suitable to recognize users with high accuracy, high flexibility and low execution times, using microprocessors able to solve algorithms with high- computational cost. This proposed algorithm presents the implementation of a whole minutiae extraction fingerprint algorithm using a Spartan-6 FPGA, as an proper solution for portable devices and for the low-cost consumer market. Keywords— Minutiae extraction algorithm, field-programmable gate array (FPGA), Mimas V2 development board. | |||||||||
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