DOIONLINE 
DOIONLINE Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
 Journal Home Volume Issue |
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Issue |
Volume-5,Issue-8 ( Aug, 2017 ) | |||||||||
Paper Title |
Design and Implementation of Reed Soloman Encoder and Decoder | |||||||||
Author Name |
Ekta V. Gedam, A.V.Mahatme | |||||||||
Affilition |
Electronics and Communication Department, Kavikulguru Institute of Technology and Science, Ramtek (Affiliated to Rashtrasant Tukdoji Maharaj Nagpur University) | |||||||||
Pages |
35-38 | |||||||||
Abstract |
Reed-Solomon (RS) codes are widely used to identify and correct errors in transmission and storage system. When Reed-Solomon codes are used for high reliable systems, the designer should also take into account the occurance of faults in the encoder and decoder subsystems. In this, Reed-Solomon encoder is the linear feedback shift register that is implemented using VHDL and in decoder, syndrome calculator, Berlekamp-Massey Algorithm, Chien-Search component of decoder to improve the maximum frequency of Reed-Solomon codes Index terms - Forward error correction (FEC) code, Redundancy, Galois Field, Berlekamp-Massey, Euclid, Chien Search. | |||||||||
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