DOIONLINE 
DOIONLINE Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
 Journal Home Volume Issue |
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Issue |
Volume-5,Issue-3 ( Mar, 2017 ) | |||||||||
Paper Title |
FPGA Implementation of Generalized Hough Transform | |||||||||
Author Name |
Vijay Kumar Kawde | |||||||||
Affilition |
EXTC Department, LTCOE, Navi Mumbai, MH, India | |||||||||
Pages |
61-63 | |||||||||
Abstract |
Hough transform is used for robust detection of line and circles in an Image. Hough Transform provides accurate results in case of noise and faulty input data of an image. This paper gives design of FPGA hardware implementation of Generalized Hough transform. Input image can be of maximum size of HD image. Xilinx 13.2 Design suite is used for simulation and XC6SLX45 FPGA device of SPARTAN-6 family is used as hardware. Index Terms—Hough Transform and voting scheme, Xilinx simulation, FPGA Design | |||||||||
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