DOIONLINE 
DOIONLINE Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
 Journal Home Volume Issue |
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Issue |
Volume-4,Issue-11 ( Nov, 2016 ) | |||||||||
Paper Title |
FPGA Implementation For OMR Answer Sheet Scanning Using State Machine and IR Sensors | |||||||||
Author Name |
Akhilesh Patil, Madhusudhan Naik, P.H.Ghare | |||||||||
Affilition |
Asst.Professor Department of Electronics and Communication Engineering Visvesvaraya National Institute of Technology Nagpur, India | |||||||||
Pages |
15-20 | |||||||||
Abstract |
In this era, we have many optical mark recognition (OMR) sheets scanning technology to evaluate surveys, tests and assessments ,and many more. The major drawback in existing technology is that it needs a lot of time for scanning and subsequently checking through desktop application via image processing. This increases computational time along with system cost. To ameliorate the time complexities we have come up with dedicated hardware for OMR sheet checking as an alternative for image processing techniques . The array of IR sensor is used to scan the answers which is in the form of black bubble . We use Reconfigurable Technology FPGA for computational purpose in evaluating the answers of OMR sheet. A Finite state machine is designed in VHDL for FPGA . It is easy to handle and we just have to place the answer sheet and roll the sensors once. We would get the results on display of the board as well as on the serial monitor on PC. Designing the dedicated parallel hardware on FPGA for OMR sheet checking helped to increase the speed of evaluation and also cost , efficiency. The scanner worked well in indoor lightning conditions even in dark . Keywords- FPGA,VHDL,OMR, State Machine, IR sensors, reconfigurable technology | |||||||||
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