Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
Journal Home Volume Issue |
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Issue |
Volume-2,Issue-4 ( Apr, 2014 ) | |||||||||
Paper Title |
Interline Unified Power Quality Conditioner: Design And Simulation | |||||||||
Author Name |
V.S.Venkatesan, P.Chandhra Sekhar, R.A.Deshpande , V.Muralidhara | |||||||||
Affilition |
Distribution Systems Division Central Power Research Institute, Bangalore Associate Director & Prof. of EEE SET, Jain University, Bangalore | |||||||||
Pages |
57-61 | |||||||||
Abstract |
Abstract—This paper proposes a new connection for a UPQC to improve the power quality of two feeders in a distribution system. A UPQC consists of a series dynamic-voltage restorer (DVR) and a shunt active power filter (APF) both joined together by a common dc bus. It is demonstrated how this device can be connected between two independent feeders to regulate the bus voltage of one of the feeders while regulating the current across a load in the other feeder. Since the UPQC is connected between two different feeders (lines), this connection of the UPQC will be called an interline UPQC (IUPQC). The structure, control and capability of the IUPQC are discussed in this paper. The efficacy of the proposed configuration has been verified through simulation studies using Matlab. | |||||||||
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