DOIONLINE 
DOIONLINE Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
 Journal Home Volume Issue |
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Issue |
Volume-3, Issue-6 ( Jun, 2015 ) | |||||||||
Paper Title |
Comparison Of Single Precision Floating Point Multiplier Using Different Multiplier Algorithms | |||||||||
Author Name |
Bhavesh Sharma, Ruchika Mishra, Nilesh Didwania, Aritra Mitra, Amit Baksi | |||||||||
Affilition |
5th Year Dual Degree M.Tech KIIT University , 5th Year Dual Degree M.Tech KIIT University , 5th Year Dual Deg M.Tech KIIT University, 5th Year Dual Degree M.Tech KIIT University , Assistant Professor KIIT University | |||||||||
Pages |
106-109 | |||||||||
Abstract |
This paper contains design of a single precision floating point multiplier by using different 24X24 bit multiplier and then comparing the different floating point multiplier for the various performance parameters. The multipliers included in this comparison are array multiplier, radix 4 booth multiplier, wallace tree multiplier and vedic multiplier. The designs are modeled in Verilog HDL and synthesized based on the TSMC 180nm standard cell library. Comparisons are based on the synthesis result obtained by synthesizing all the multiplier using Cadence Encounter RTL Compiler . Keywords :Floating Point , Floating Point Multiplier | |||||||||
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