DOIONLINE

DOIONLINE NO - IJEEDC-IRAJ-DOIONLINE-225

Publish In
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC
Journal Home
Volume Issue
Issue
Volume-1,Issue-8  ( Oct, 2013 )
Paper Title
Multi-Mode Floating Point Multiplier With Parallel Operations
Author Name
R. Arokia Priya, Nithu.S.Mangalath
Affilition
Asst. Professor, D.Y. Patil College of Engineering, Akurdi, University of Pune, India
Pages
66-68
Abstract
Most modern processors have hardware support for single precision and double precision floating point multiplication. For many scientific computations like climate modeling, computational physics and computational geometry this support is inadequate. They impose the use of quadruple precision arithmetic because it provides twice the precision of double precision format. The proposed design performs four single precision multiplications in parallel, or two double precision multiplications in parallel, or one quadruple precision multiplication. The throughput is increased by a factor of four for single precision multiplication and by two for double precision multiplication
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