DOIONLINE 
DOIONLINE Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
 Journal Home Volume Issue |
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Issue |
Volume-1,Issue-6 ( Aug, 2013 ) | |||||||||
Paper Title |
Cost Analysis Of Digital Fir Filter Using Different Window Techniques | |||||||||
Author Name |
Saikee Chauhan, Lalita Sharma, Rajesh Mehra | |||||||||
Affilition |
NITTTR, Chandigarh | |||||||||
Pages |
25-29 | |||||||||
Abstract |
In FIR filter implementation, numbers of multiplier and adder circuits play an important role in chip area, speed and cost. In this paper, cost has been analyzed based on various windowing techniques. All window techniques have been compared in terms of number of adders and multipliers. The filter has been designed and simulated using Matlab 7.6. Results show that performance of Blackman & Hanning window techniques are better as compared to Rectangular,Hamming and Bartlett. Performance has been further improved using Kaiser and Equiripple window methods. Equiripple window based FIR filter has shown 28.97% reduction in multiplier and 29.08% in adder as compared to Kaiser to provide cost effective solution for DSP applications. | |||||||||
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