DOIONLINE 
DOIONLINE Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
 Journal Home Volume Issue |
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Issue |
Special Issue-1 ( Apr, 2015 ) | |||||||||
Paper Title |
Hybrid Encryption And Decryption Method Using Lsb And Rsa In Steganography | |||||||||
Author Name |
Megha S. Lahase, S. A. Dhole. | |||||||||
Affilition |
Department of Electronics and Telecommunication, Bharati Vidyapeeth’s College of Engineering for women, Pune, India | |||||||||
Pages |
68-70 | |||||||||
Abstract |
Steganography is the art of hiding information in other information, the fact that communication is taking place. Many unusual carrier formats can be used; digital images are the most popular used in steganography. In this paper hybrid combination of least significant bit as well as RSA algorithms are used for encryption and decryption process. Embedding secret information inside cover images needs intensive computations, and thus, designing steganography in hardware speeds up steganography. This work indicates a hardware design of Least Significant Bit (LSB) as well as RSA steganography technique in a Spartan 3 FPGA board. Keywords— Steganography; FPGA; Security; LSB; RSA; Cover image; Secret image. | |||||||||
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