Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
Journal Home Volume Issue |
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Issue |
Volume-8,Issue-7 ( Jul, 2020 ) | |||||||||
Paper Title |
FPGA Implementation of Novel S-Box, Mixcolumn and Addround Key Based Advanced Encryption System | |||||||||
Author Name |
Sapnakumaric, K.V.Prasad | |||||||||
Affilition |
Ph.D. Research Scholar, Jain University, Bangalore, India Professor & Head, Dept. of ECE, Bangalore Institute of Technology, Bangalore, India | |||||||||
Pages |
23-26 | |||||||||
Abstract |
For every Communication system, security is very important to transmitting and receiving of video, audio and image. The research work is to develop a novel approach of AES algorithm and its FPGA implementation. Individual modules of AES are designed using novel techniques such as Elliptic Curve Cryptography (ECC) and Bitwise Matrix Code (BWMC) as well as Stellar Matrix (SM) to optimize various parameters. The paper presents the results of FPGA implementation of novel approach AES. Keywords - AES, ECC, BWMC, BEDT, SM, LUT, FPGA | |||||||||
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