DOIONLINE 
DOIONLINE Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
 Journal Home Volume Issue |
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Issue |
Volume-3, Issue-1 ( Jan, 2015 ) | |||||||||
Paper Title |
Characterization And Simulation Of Sige Mosfet | |||||||||
Author Name |
Swati Bairagi, Suman Kumar Choudhary, Virendra Ramesh Koli | |||||||||
Affilition |
Electronics and communication Department, MPSTME, NMIMS University, Mumbai, India Department of Electronics Engineering, Amrutvahini College of Engineering, Sangamner, India Electronics and communication Department Terna College of Engineering, Nerul, Navi Mumbai, India | |||||||||
Pages |
44-46 | |||||||||
Abstract |
Strain in silicon is a powerful technology of increasing MOSFET performance. It has improved carrier transport properties (mobility). This relatively new technology offers opportunities in mixed signal circuits and analog circuits IC design and manufacture. Strained silicon is a layer of silicon in which Si atoms are stretched beyond their normal interatomic distance. This is done by putting layer of Si over substrate of Silicon germanium (SiGe). Moving silicon atoms further apart reduces the atomic force which interferes with movement of electrons. We have explored the SiGe MOSFET to replace the currently planar MOSFET’s. Gate length of this device is 0.1µm and channel width is 0.022µm. We have used General Purpose Semiconductor Simulator and obtained 3D plots. Also we have used TCAD tool Athena and Atlas Simulator and determined I-V characteristics, C-V characteristics and Id-Vg characteristics. | |||||||||
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