DOIONLINE 
DOIONLINE Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
 Journal Home Volume Issue |
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Issue |
Volume-7,Issue-2 ( Feb, 2019 ) | |||||||||
Paper Title |
A5.8 GHz Fractional-N Synthesizer for Wireless Transceiver Applications | |||||||||
Author Name |
Yan Dan Lei, Zhao Bin, Yoshida Akira, Kasa Yasushi, M. Kumarasamy Raja | |||||||||
Affilition |
Institute of Microelectronics, A*STAR, Singapore CM Engineering Co., Ltd, Japan | |||||||||
Pages |
52-54 | |||||||||
Abstract |
This paper presents a 5.8 GHz fractional-N synthesizer that is used for wireless transceiver applications in 55nm CMOS process. The synthesizer could cover 5.8GHz frequency band with quadrature I/Q output. Simulations show that the phase noise (PN)@11.6GHzof the synthesizer is -80dBc/Hz, -95dBc/Hz and -105dBc/Hz with frequency offsets of 50kHz, 100kHz and 1MHz respectively. The die area of the proposed synthesizer is 0.6mm X 0.7mm. The current consumption of the synthesizer is 15mA with 1.2V supply voltage. Keywords - CMOS, PLL, FRACTIONAL-N Synthesizer | |||||||||
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