Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
Journal Home Volume Issue |
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Issue |
Volume-6,Issue-10 ( Oct, 2018 ) | |||||||||
Paper Title |
Design and Simulation of LNA for UWB Application | |||||||||
Author Name |
Anand Singh Tomar, Manish Kumar, Abhay Chaturvedi | |||||||||
Affilition |
G.L.A University | |||||||||
Pages |
29-32 | |||||||||
Abstract |
This paper presents a new noise cancellation and current reuse topology for low noise amplifier. the working guideline noise cancellation and current- reusing are proposed to improve the performance of noise and reduce the power dissipation. by using auxiliary path technique of noise cancellation schema is realized by mutually cancelling the noise current of the common source and common gate amplifier. fabricated in 180nm CMOS, the LNA measured voltage gain >10db, minimum noise figure of 2 db. the whole circuit only consumes a power dissipation of 1.4mW.LNA structure composed of a Common gate stage and a Common source stage solves the fundamental tradeoff between noise figure and impedance matching and also offer voltage gain. Keyword - LNA; Noise Cancellation; Low Power; Impedance Matching, Noise Figure. | |||||||||
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