DOIONLINE 
DOIONLINE Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
 Journal Home Volume Issue |
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Issue |
Volume-6,Issue-10 ( Oct, 2018 ) | |||||||||
Paper Title |
Performance Analysis of CNTFET based Digital Circuits | |||||||||
Author Name |
Shah Newaz, S.M. Nizam Uddin, Md. Khairul Hasan Neon, Mohammad Imtiazul Haque | |||||||||
Affilition |
Department of Electrical and Electronics Engineering, 408/1, Kuratoli, Khilkhet, Dhaka 1229 (American International University-Bangladesh, Bangladesh) | |||||||||
Pages |
22-28 | |||||||||
Abstract |
This paper investigates the performance characteristic of CNTFET for different digital circuits to analyze CNTFET’s potential to replace current transistor technology which is based on CMOS. The circuits that are designed and simulated for the analysis are Half Adder, Half Subtractor and 4-to-2 bit Simple Encoder. 32nm CNTFET HSPICE model are being used for simulation of the circuits and whole process is repeated for 32nm CMOS HSPICE model, where CMOS model is considered as the reference for comparison due to the fact that, it is the on hand technology. The primary parameter used for comparison is Power-Delay Product. Values obtained from both the model of CMOS and CNTFET are compared to determine whether CNTFET has the required potential to become the future of transistor industry. This work is mainly a quantitative analysis where, the obtained result shows how capable CNTFET can be, as it show signs of excellent Power- Delay Product(PDP) characteristics when weighed against CMOS technology. Keywords - CNTFET, CMOS, Power Consumption, Time Delay, Power-Delay Product (PDP). | |||||||||
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