DOIONLINE 
DOIONLINE Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
 Journal Home Volume Issue |
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Issue |
Volume-2,Issue-8 ( Aug, 2014 ) | |||||||||
Paper Title |
Malicious Stuck-At Fault And Somersault Trojan Detection In Combinational Circuits Using Power Analysis | |||||||||
Author Name |
Karthikeyan G, Maheshwarn M, Gali Geetha Madhav, Narmadha P, Sadhu Mounika, N Mohankumar | |||||||||
Affilition |
VLSI Design Research Group Department of Electronics and Communications Engineering, Amrita School of Engineering, Amrita Vishwa Vidyapeetham, Coimbatore, India | |||||||||
Pages |
43-46 | |||||||||
Abstract |
Adding a malicious circuitry during hardware design and fabrication causes a serious threat and needed to be done with most caution. Such malicious circuitry called hardware Trojan (also referred as tampering) causes an integrated circuit (IC) to have altered behaviour such as misbehaving, transmitting information to the adversary etc., which leads to loosing safety in critical applications. So in this paper we propose a method to detect the Trojan presence using power analysis methodology. Our results presented in this paper shows the reliability of power analysis method and its uses. | |||||||||
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