DOIONLINE 
DOIONLINE Publish In |
International Journal of Electrical, Electronics and Data Communication (IJEEDC)-IJEEDC |
 Journal Home Volume Issue |
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Issue |
Volume-5,Issue-11 ( Nov, 2017 ) | |||||||||
Paper Title |
Design of Optimised Encryption Algorithm with High Security Error Probability | |||||||||
Author Name |
B. Sunil Kumar1, A.Radha, S.Baba Fariddin | |||||||||
Affilition |
ASSISTANT PROFESSOR, DEPT OF E.C.E, SRI SARATHI INSTITUTE OF ENGINEERING AND TECHNOLOGY, NUZVID, ANDHRA PRADESH ASSOCIATE PROFESSOR, DEPT OF E.C.E, ST.MARY’S GROUP OF INSTITUTIONS, GUNTUR, ANDHRA PRADESH ASSISTANT PROFESSOR, DEPT OF E.C.E, ST.MARY’S GROUP OF INSTITUTIONS, GUNTUR, ANDHRA PRADESH | |||||||||
Pages |
21-24 | |||||||||
Abstract |
A novel scheme for HILL cipher algorithm based data hiding in encrypted texts is proposed in this work. In the first work, by using an encryption key a content owner encrypts the original uncompressed text. Then, to create a sparse space to accommodate some additional data it may compress the least significant bits of the encrypted text by using a datahiding key. Today in many applications the communication processes are still used. The design of AES are held in various part implementation such as round key mechanism in previous. In this to improve the security of the system and reduce the power consumption by encryption we proposed an algorithm and error correction method especially for side channel attacks. An optimised encryption standard for the key generation. An additional data contained with an encrypted text, if the recipient has the hided key, he can get the additional data though he does not know about the full content. If the recipient has the encryption key, to obtain the same text similar to the original information. Index terms - OES, Hill cipher, side-channel attack, VLSI, round key mechanism. | |||||||||
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