DOIONLINE

DOIONLINE NO - IJASEAT-IRAJ-DOIONLINE-299

Publish In
International Journal of Advances in Science, Engineering and Technology(IJASEAT)-IJASEAT
Journal Home
Volume Issue
Issue
Volume-1,Issue-2  ( Oct, 2013 )
Paper Title
Reduced Area Fully Parallel And Fully Serial Fir Filter On Field-Programmable Gate Array
Author Name
Nilesh B. Bosmiya, R. C. Patel
Affilition
PG Student L.D. College of Engineering, PROF. L.D. College of Engineering
Pages
03-06
Abstract
In this paper fully serial and fully parallel FIR filters are designed with different quantization on FPGA for low area requirement. Modified fully serial and fully parallel band-pass FIR filters with same specification as in reference paper designed and simulated on ISE. The suggested implementations are synthesized with Xilinx ISE 14.2 version. Results show that compare with reference paper low area and better speed are achieved
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