DOIONLINE 
DOIONLINE Publish In |
International Journal of Advances in Science, Engineering and Technology(IJASEAT)-IJASEAT |
 Journal Home Volume Issue |
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Issue |
Volume-2,Issue-3 ( Jul, 2014 ) | |||||||||
Paper Title |
A Novel Architecture Implementation Of Fir Filter Using Truncated Multiplier | |||||||||
Author Name |
U.bhagyalakshmi, R. Kalyan, V. Keerthy Rai | |||||||||
Affilition |
Student, Dept of Electronics and Communication Engineering, Swetha Institute of Technology and Science, Tirupati, Chitoor Dist, AP, India Assistant Professor, Dept of Electronics and Communication Engineering, Swetha Institute of Technology and Science, Tirupati, Chitoor Dist, AP, India Assistant Professor, Dept of Electronics and Communication Engineering, Swetha Institute of Technology and Science, Tirupati, Chitoor Dist, Ap, India | |||||||||
Pages |
127-131 | |||||||||
Abstract |
Low-cost finite impulse response (FIR) designs are presented using the concept of faithfully rounded truncated multipliers. We consider both the optimization of bit width and hardware resources without enduring the frequency response and output signal precision. To reduce total area cost Non-uniform coefficient quantization with proper filter order is proposed. Multiple constant multiplication/accumulation in a direct FIR structure is implemented by means of an enhanced version of truncated multipliers. Comparisons with earlier FIR design approaches show that the proposed designs achieve the best area and power results. | |||||||||
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