DOIONLINE 
DOIONLINE Publish In |
International Journal of Advances in Electronics and Computer Science-IJAECS |
 Journal Home Volume Issue |
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Issue |
Volume-3,Issue-1 ( Jan, 2016 ) | |||||||||
Paper Title |
Feature Point Detection Hardware Based on Fast and Brief Algorithm | |||||||||
Author Name |
Chang-Sue Seo, Sung-Young Kim, Jae-Pil Ko, Hoon-Ju Chung, Yong-Hwan Lee | |||||||||
Affilition |
Dept. of Electronic Engineering, School of Computer Engineering, School of Electronic Engineering Kumoh National Institute of Technology, Gumi, Korea | |||||||||
Pages |
81-84 | |||||||||
Abstract |
In this paper, we present method that detects useful feature points and creates descriptor for object recognition based on hardware architecture. We propose hardware architecture that uses FAST and BRIEF algorithms. Feature point detection process needs extensive computing power and processing time. Therefore, we build hardware structure for real-time processing. Loading the images in parallel, creating Gaussian filter image, finding feature point candidates, selecting valid feature point, and creating descriptor modules operate simultaneously and independently using pipeline structure to reduce processing time. Proposed hardware architecture of FAST and BRIEF algorithms is simulated by Modelsim and ISE software program. The result of our hardware structure shows that 44fps achieved in case of 1920 x 1080 resolution image. Index Terms- FAST, BRIEF, Feature Point, Descriptor. | |||||||||
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