DOIONLINE

DOIONLINE NO - IJAECS-IRAJ-DOIONLINE-2160

Publish In
International Journal of Advances in Electronics and Computer Science-IJAECS
Journal Home
Volume Issue
Issue
Volume-2, Issue-5  ( May, 2015 )
Paper Title
Modeling And Simulation Of Six-Level Diode Clamped Multilevel Inverter
Author Name
Naina M. Mulani, A. S. Sindekar
Affilition
1 P.G. Research Scholar, Head, Department of Electrical Engineering, Government College of Engineering, Amravati, India.
Pages
63-66
Abstract
The paper presents modeling and simulation of six-level diode clamped multilevel inverter (DCMLI) for three phase power supply unit. The model presented consist of five series connected dc sources, a six-level DCMLI and a three phase induction motor as load. In order to validate the model simulation studies of two-level, three-level and six-level total harmonic distortion (THD) using Fast Fourier Transform (FFT) presented here. Keywords- Fundamental Switching, Harmonic Elimination, Multilevel Inverter, SPWM.
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